En poursuivant votre navigation, vous acceptez l'utilisation de cookies destinés à améliorer la performance de ce site et à vous proposer des services et contenus personnalisés.


Large area electronics - Activities

Silicon Large Area Electronics

- From 2003 to 2012 the Large Area Electronics team has conducted strong research on μc-Si:H for TFTs.
- We have obtained significant results on flexible electronics in the framework of Flexidis and
AmazOLed , both European Comunity funded projects.
- We'd like to highlight the achievement of NMOS and PMOS TFTs based on μc-Si films produced by PECVD.
- The figures below provide an illustration of TFTs of PET foils and on dynamic modelling.
             Flexible μc-Si TFT                                                                      Dynamic model of μc-Si TFT

Organic Large Area Electronics

-The work done at PICM aimed at establishing applicable theoretical descriptions of organic diodes and transistors. 
-Tools for this project include analytical calculation and numerical simulation. 

-The physical models were integrated in circuit simulators, thus connecting the device and system levels.

Modeling of Organic Diodes
Our numerical model is based on the following facts:

  • Under reverse bias, the impedance response of the diode is that of a perfect capacitance, with a value that does not depend on the applied voltage. This is at variance with the conventional Schottky diode model, which predicts that the capacitance should vary as the reversed square root of the reverse bias.
  • Organic semiconductors behave more like insulators than conventional semiconductors.
  • Shortly, the organic diode is actually fully depleted at all bias.

Our model matured under three successive stages:

  1. Development of a simplified analytical equation.
  2. Numerical simulation with a software package that solves the two dimensional equations through finite element calculations.
  3.  Validation of  model results on real devices.

Modelling of Organic Field-effect Transistors (OFET)
The modelling of OFETs is performed at varous levels

  1. Analytical equations.
  2. Numerical simulation.
  3. Compact modelling.

Thanks to our approach we have found that the performance of OFETs is dictated by several basic parameters

  • The charge carrier mobility, which is several orders of magnitude lower than that of silicon.
  • The mobility is significantly dependent on the density of charge carriers. In a OFET, it may have a primary effect on the modeling of the device.
  • The contact resistance. We have shown that  in OFETs contact resistence largely depends on the configuration of its elements. In particular whether the source and drain are on the same side (planar) or on the opposite side (staggered) as the gate-dielectricsemiconductor interface.
The last step of compact modeling was carried out under a collaborative effort with the group of Professor Benjamín Iñiguez at the DEEEA in the University Rovira i Virgili in Tarragona, Spain.
The main challenge for the model was to find analytical equations to account for the current in all three operating domains of the device, namely the off state, and the sub-threshold and above threshold regimes.
Numerical model for the charge distribution in bottom-gate OFETs.